BRBUILDLOG:command:br_prepare_repo binutils_gdb master ---> git remote prune origin ---> git pull --all Fetching origin Already up-to-date. Current top commit: commit 9b444f9533c38016e4f2de0198c889b13a62d2bc Author: Faraz Shahbazker Date: Wed Jun 19 15:55:04 2019 -0700 MIPS/gas: Fix order of instructions in LI macro expansion When MTHC1 instruction is paired with MTC1 to write a value to a 64-bit FPR, the MTC1 must be executed first, because the semantic definition of MTC1 is not aware that software will be using an MTHC1 to complete the operation, and sets the upper half of the 64-bit FPR to an UNPREDICTABLE value[1]. Fix the order of MTHC1 and MTC1 instructions in LI macro expansion. Modify the expansions to exploit moves from $zero directly by-passing the use of $AT, where ever possible. [1] "MIPS Architecture for Programmers Volume II-A: The MIPS32 Instruction Set Manual", Wave Computing, Inc., Document Number: MD00086, Revision 5.04, December 11, 2013, Section 3.2 "Alphabetical List of Instructions", pp. 217. gas/ * config/tc-mips.c (macro) : Re-order MTHC1 with respect to MTC1 and use $0 for either part where possible. * testsuite/gas/mips/li-d.s: Add test cases for non-zero words in double precision constants. * testsuite/gas/mips/li-d.d: Update reference output. * testsuite/gas/mips/micromips@isa-override-1.d: Likewise. * testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise. * testsuite/gas/mips/mips64r2@isa-override-1.d: Likewise. Outstanding patch: BRBUILDLOG:starttime:1561482842 BRBUILDLOG:stoptime:1561482845 BRBUILDLOG:duration:3 BRBUILDLOG:status:0 BRBUILDLOG:command:br_prepare_repo gcc master ---> git remote prune origin ---> git pull --all Fetching origin error: Your local changes to the following files would be overwritten by merge: gcc/config/tilegx/mul-tables.c Please, commit your changes or stash them before you can merge. Aborting Updating a16222e..08f06db BRBUILDLOG:starttime:1561482846 BRBUILDLOG:stoptime:1561482849 BRBUILDLOG:duration:3 BRBUILDLOG:status:1